On Fri, Nov 03, 2000 at 04:50:05PM -0700, Michal Jaegermann wrote:
> On Fri, Nov 03, 2000 at 04:24:02PM -0700, Maurice Hilarius wrote:
> > I remember watching Michal making dark mutterings about some of the
> > Soundblaster PCI cards last year. Essentially they "assumed" that PCI would
> > only use 16 bit addressing space..
>
> I think that you are thinking about four bits for interrupts thus
> making only 0 to 15 available. (Did one ever heard about a computer
> with such weird IRQ assignments like these?
> ............
> 20: 144686 sym53c8xx
> 44: 351038 eth0
>:-)
A little background:
Most Intel-based motherboards (and some of the older Alphas) were
built to support only 16 interrupts: the legacy ISA (junk IO) ones,
plus any PCI slots present also have their interrupts mapped somewhere
into those 16 levels. Some newer Intel-based mobos, and most Alphas,
have additional interrupt controller bits beyond 16, that are mapped
however the mobo designers wanted.
Now, IIRC, the PCI spec says that a "slot" can have one of 4 different
interrupts (INTA, INTB, etc), and the PIN register in the card's
config space indicates which one is being used. This is NOT
programmable, it is set by the card design. Nearly all cards use INTA,
but multi-function boards, or cards with PCI-PCI bridges, may actually
use more than 1.
On most Alphas, the PCI interrupt routing typically passes all 4 of
the possible interrupts from a PCI "slot" to the interrupt summary
register. So, for a 4-PCI-slot mobo, you get 16 additional interrupts
after the 16 legacy ones. So often you see cards in adjacent slots
assigned interrupts that are 4 levels apart (but it really depends
on the mapping of slot/INTx pairs to bits in the summary register).
With multiple peer PCI buses (as on DS20/ES40/XP1000/UP2000 but not
DS10), the number of interrupts grows. In fact, for the WILDFIRE
support in the 2.4.x kernels, the maximum number of interrupts has
grown to 2048! Yes, that's right, 2K. Largest config has 8 "quads" (4
CPUs and up to 8 PCI buses per quad); each pair of PCI buses has 8
(2x4) slots (32 interrupts), plus one set of the 16 legacy
interrupts. Yes, that's only 48 per bus pair, we kept 16 spares so
that a bus pair's interrupts would occupy a single 64-bit summary
register (and the interrupts are actually numbered/wired for 0-15 and
32-63:-).
> Sound cards are infamous for cutting PCI spec corners. Such card which
> got IRQ 37 will think that is really on 5. Oops! Other devices seems to
> be quite a bit better in this respect.
No, the cards themselves pay no attention to what's in their IRQ
register, that's entirely a software convention (putting the interrupt
number in there). SRM console does it so that the Tru64 kernel doesn't
have to have all those funky "irq_map" tables that the Linux kernel
Alpha support has... ;-}
WRT cost-cutting, IIRC, the 1370/1371 sound chips were limited in the
addresses that they could DMA from/to; Alpha support typically will
provide them with a DMA address above 1GB, which those cards can't
handle (not enough bits in their address registers).
--Jay++
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Jay A Estabrook Alpha Engineering - LINUX Project
Compaq Computer Corp. - MRO1-2/K20 (508) 467-2080
200 Forest Street, Marlboro MA 01752 Jay.Estabrook@compaq.com
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