Ralph Green, Jr. (Ralph.Green@wcom.com)
Wed, 21 Apr 1999 17:39:16 -0500
Isamu,
You are pretty close.
To error correct n bits, you need
(log(any base) n / log (same base) 2) + 1
To correct 8 bits needs: (.903 / .301) + 1 or 4 bits
To correct 64 bits needs: (1.806 / .301) + 1 or 7 bits
Your simm requirements depend on how the chipset decodes and error correct. If it were to error correct on a byte basis, a 64 bit SIMM would need 8 times 12 bits or 96 bits to do ECC. If it corrects on a 64 bit word basis, you need 64 + 7 or 71 bits. Since parity dimms actually provide enough bits to do real single bit error correction on a word basis, that is currently done.
If I assume log means log to the base 2, then your statement is almost true. Just add 1 more to get the number of needed bits.
In response to the welcome remarks of Isamu at 03:30 PM 4/21/99 -0400:
>On Wed, 21 Apr 1999, Chris Price wrote:
>Last I checked, this isn't the case. To ECC protect data like I remember
>a certain algorithm, you need log2(bit width) of extra bits to protect
>(or something close), such that 64 bit data width gets you 8 bits ECC.
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