However, all this information rather overwhelms me - perhaps we can
simplify things a bit. A compiler is (roughly) some program that
reads a text file (i.e. a stream of bytes), transforms that to an
intermediate representation (tree structure, in gcc's case),
manipulates that tree of structures (optimisation passes) and writes
the assembler output (again a stream of bytes). Now neither bytes,
nor the members of the various structures used in gcc internally,
are necessarily long- or quadwords (i.e. 32 or 64 bit quantities).
Combine that with the knowledge that not many ALPHA implementations
support the byte/word extension (BWX) that allows direct word and
byte load/store, and you'll arrive at the conclusion that the ALPHA
chips are not well suited for compilation in the way gcc (and most
compilers) do it. I must add to this that every day I am more and
more amazed at the compile speeds that I get using *Digital* Fortran
on our 21064's ...
A simple example suffices - compile the following on your x86 box
and on an ALPHA, say with -O2:
void copy(char *s, char *d)
{
while (*d++ = *s++)
;
}
This code uses three instructions in the loop on my m68k machine -
including the jump (which is one more than necessary). I would be
surprised if the number of instructions on an ALPHA would be less
than ten. On the granddaddy of supercomputers, the Cray Y-MP, it
takes over 80 instructions.
Cheers,
Toon.
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